ANAFLASH publishes A-SSCC 2025 paper
The paper details a 28nm AI microcontroller with zero-standby power weight memory using 4 Mb 4-bits/cell embedded flash for low-power edge AI.
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Semiconductor solutions for real-time edge intelligence
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In short: ANAFLASH showcased its compute-in-memory IP at industry events and secured funding to commercialize its edge AI microcontrollers.
The paper details a 28nm AI microcontroller with zero-standby power weight memory using 4 Mb 4-bits/cell embedded flash for low-power edge AI.
It addresses inefficiencies in von Neumann architectures and limitations of charge- and current-domain CiM, offering wide dynamic range, ultra-low power, and digital scalability for AI accelerators.
ANAFLASH develops an AI MCU using Samsung Foundry’s 28 nm process and Logic-EFLASH technology for energy-efficient smart edge devices. The collaboration originated via SEMIBRAIN's contest win.
ANAFLASH presents its Reflex Computing Unit, integrating embedded FLASH for efficient parallel AI inferencing, reducing energy overhead.
In-memory approaches for AI bottlenecks were discussed at DAC 2026 by TetraMem and ANAFLASH, with Synopsys as the moderator.
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